STL instruction and memory observers

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Does STL instruction ensures that all observers will observe load/stores which placed in program order before STL instruction, I mean does it work as DMB?
arm arm64 memory-barriers
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Does STL instruction ensures that all observers will observe load/stores which placed in program order before STL instruction, I mean does it work as DMB?
arm arm64 memory-barriers
Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21
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Does STL instruction ensures that all observers will observe load/stores which placed in program order before STL instruction, I mean does it work as DMB?
arm arm64 memory-barriers
Does STL instruction ensures that all observers will observe load/stores which placed in program order before STL instruction, I mean does it work as DMB?
arm arm64 memory-barriers
arm arm64 memory-barriers
edited Nov 8 at 13:00
asked Nov 8 at 12:50
scopichmu
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387
Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21
add a comment |
Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21
Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21
Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21
add a comment |
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From my reading, it performs a store, then a store-store barrier on the share-ability domain encoded by the pte of the store address. It seems an improvement to free the program from having to know which domain a given address corresponds to, or needlessly using the outermost (slowest) barrier.
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1 Answer
1
active
oldest
votes
1 Answer
1
active
oldest
votes
active
oldest
votes
active
oldest
votes
up vote
0
down vote
From my reading, it performs a store, then a store-store barrier on the share-ability domain encoded by the pte of the store address. It seems an improvement to free the program from having to know which domain a given address corresponds to, or needlessly using the outermost (slowest) barrier.
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up vote
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From my reading, it performs a store, then a store-store barrier on the share-ability domain encoded by the pte of the store address. It seems an improvement to free the program from having to know which domain a given address corresponds to, or needlessly using the outermost (slowest) barrier.
add a comment |
up vote
0
down vote
up vote
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down vote
From my reading, it performs a store, then a store-store barrier on the share-ability domain encoded by the pte of the store address. It seems an improvement to free the program from having to know which domain a given address corresponds to, or needlessly using the outermost (slowest) barrier.
From my reading, it performs a store, then a store-store barrier on the share-ability domain encoded by the pte of the store address. It seems an improvement to free the program from having to know which domain a given address corresponds to, or needlessly using the outermost (slowest) barrier.
answered yesterday
mevets
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Looks like STL doesn't work as DMB since it is single-copy atomic instruction.
– scopichmu
Nov 8 at 13:21