x74_151 MUX Simulation not having correct output
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I'm simulating a x74_151 Mux on Xilinx but when I force the Enable to 0 and Force the clock on the 3 Control Inputs, there is not output.
Refer to the pictures. https://i.stack.imgur.com/vqc7F.png
Thanks
logic simulation xilinx mux
asked Nov 8 at 22:14
guasabito
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up vote
0
down vote
favorite
I'm simulating a x74_151 Mux on Xilinx but when I force the Enable to 0 and Force the clock on the 3 Control Inputs, there is not output.
Refer to the pictures. https://i.stack.imgur.com/vqc7F.png
Thanks
logic simulation xilinx mux
asked Nov 8 at 22:14
guasabito
13
add a comment |
up vote
0
down vote
favorite
up vote
0
down vote
favorite
I'm simulating a x74_151 Mux on Xilinx but when I force the Enable to 0 and Force the clock on the 3 Control Inputs, there is not output.
Refer to the pictures. https://i.stack.imgur.com/vqc7F.png
Thanks
logic simulation xilinx mux
asked Nov 8 at 22:14
guasabito
13
I'm simulating a x74_151 Mux on Xilinx but when I force the Enable to 0 and Force the clock on the 3 Control Inputs, there is not output.
Refer to the pictures. https://i.stack.imgur.com/vqc7F.png
Thanks
logic simulation xilinx mux
logic simulation xilinx mux
asked Nov 8 at 22:14
guasabito
13
asked Nov 8 at 22:14
guasabito
13
asked Nov 8 at 22:14
guasabito
13
asked Nov 8 at 22:14
guasabito
13
asked Nov 8 at 22:14
guasabito
13
13
add a comment |
add a comment |
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